Microelectronic imagers are used in digital cameras, wireless devices with picture-taking capabilities, and many other applications. Mobile phones and personal digital assistants (PDAs), for example, are incorporating microelectronic imagers for capturing and sending pictures. The growth rate of microelectronic imagers has been steadily increasing as they become smaller and produce better images with higher pixel counts.
Microelectronic imagers include image sensors that typically use charged coupled device (CCD) systems and complementary metal-oxide semiconductor (CMOS) systems, as well as other systems. CCD image sensors have been widely used in digital cameras and other applications. CMOS image sensors are also quickly becoming very popular because they have low production costs, high yields, and small sizes.
The microelectronic imagers are often fabricated, at a wafer level, to form part of an imager module 100, shown in FIG. 1. The imager module 100 includes an imager die 112, which includes an imager array 111 on an imager substrate 110. The imager array 111 may be a CCD or CMOS imager array, or any other type of imager array. The imager module 100 also includes a lens stack 120, which includes at least one lens element 121 with at least one corresponding spacer wafer 122. The spacer wafer 122 maintains the lens element 121 at a proper distance from the imager array 111, such that a desired amount of light striking the convex side of the lens element 121 is directed through an aperture 140 to the imager array 111. The lens stack 120 may be bonded to the imager die 110 by a bonding material 123 such as epoxy.
During wafer level module fabrication processes, it is necessary to protect the imager array 111 from damage. A carrier wafer can be used for this purpose.
In practice, imager modules such as the imager module 100 shown in FIG. 1 may be fabricated in mass rather than individually. Thus, as shown in FIG. 2, multiple imager dies, each die including a respective imager array 211 and a substrate 210, are contained on an imager wafer 200. The imager wafer 200 contains multiple imager arrays 211, 211′, 211″, and the imager substrate 210 of the imager wafer 200 is the substrate for the multiple imager dies. During fabrication, backside processes can be conducted substantially concurrently on each imager die on the imager wafer 200. Such backside processes may include, but are not limited to, thinning of the imager substrate 210 and providing redistribution lines (RDL) (not shown).
As shown in FIG. 1, the imager module 100 has an aperture 140 to expose the imager array 111 to light focused by the lens element 121. During wafer level module fabrication, however, leaving the imager array 111 exposed can cause damage or contamination to the imager array 111. Accordingly, in practice the imager arrays 211 on the imager wafer 200 are protected by a carrier wafer 300 (FIG. 3A) that is bonded to the imager wafer 200. The carrier wafer 300 has cavities 312 corresponding to the locations of the imager arrays 211 on the imager wafer 200.
A portion of the carrier wafer 300 bonded to the imager wafer 200 is shown in FIG. 3B, which illustrates a single etched-area 311 of the carrier wafer 300 and the corresponding single imager array 211 and associated imager substrate 210 of the imager wafer 200. The imager wafer 200 and carrier wafer 300 are shown bonded together with a bonding material 123, such as epoxy.
Once backside processing of the imager wafer 200 is complete, the carrier wafer 300 is thinned to open the cavities 312 and expose the imager arrays 211. The dashed line in FIG. 3B indicates an example level for thinning the carrier substrate 310. The portions of the carrier wafer which remain at each etched-area 311 after thinning form spacer wafers 122 (FIG. 1).
While the carrier wafer 300 provides some protection for the imager array 211 during the fabrication process, the carrier wafer 300 does not provide protection to the imager array 211 while the carrier wafer 300 itself is being thinned. As the carrier wafer 300 is being thinned to expose the cavity 312, such as through a grinding process, silicon particles and grind residues can contaminate the imager array 211. Accordingly, there is a need and desire for an efficient method of fabricating a carrier wafer that provides protection for the imager arrays of an imager wafer during the fabrication process.